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Unlike PCI or USB devices, I2C devices are not enumerated at the hardwarelevel. Instead, the software must know which devices are connected on eachI2C bus segment, and what address these devices are using. For thisreason, the kernel code must instantiate I2C devices explicitly. There areseveral ways to achieve this, depending on the context and requirements.

Method 1: Declare the I2C devices statically¶

This method is appropriate when the I2C bus is a system bus as is the casefor many embedded systems. On such systems, each I2C bus has a number whichis known in advance. It is thus possible to pre-declare the I2C deviceswhich live on this bus.

This information is provided to the kernel in a different way on differentarchitectures: device tree, ACPI or board files.

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When the I2C bus in question is registered, the I2C devices will beinstantiated automatically by i2c-core. The devices will be automaticallyunbound and destroyed when the I2C bus they sit on goes away (if ever).

Declare the I2C devices via devicetree¶

On platforms using devicetree, the declaration of I2C devices is done insubnodes of the master controller.

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Here, two devices are attached to the bus using a speed of 100kHz. Foradditional properties which might be needed to set up the device, please referto its devicetree documentation in Documentation/devicetree/bindings/.

Declare the I2C devices via ACPI¶

ACPI can also describe I2C devices. There is special documentation for thiswhich is currently located at ACPI Based Device Enumeration.

Declare the I2C devices in board files¶

In many embedded architectures, devicetree has replaced the old hardwaredescription based on board files, but the latter are still used in oldcode. Instantiating I2C devices via board files is done with an array ofstructi2c_board_info which is registered by callingi2c_register_board_info().

Example (from omap2 h4):

The above code declares 3 devices on I2C bus 1, including their respectiveaddresses and custom data needed by their drivers.


Method 2: Instantiate the devices explicitly¶

This method is appropriate when a larger device uses an I2C bus forinternal communication. A typical case is TV adapters. These can have atuner, a video decoder, an audio decoder, etc. usually connected to themain chip by the means of an I2C bus. You won’t know the number of the I2Cbus in advance, so the method 1 described above can’t be used. Instead,you can instantiate your I2C devices explicitly. This is done by fillinga structi2c_board_info and calling i2c_new_client_device().

Example (from the sfe4001 network driver):

The above code instantiates 1 I2C device on the I2C bus which is on thenetwork adapter in question.

A variant of this is when you don’t know for sure if an I2C device ispresent or not (for example for an optional feature which is not presenton cheap variants of a board but you have no way to tell them apart), orit may have different addresses from one board to the next (manufacturerchanging its design without notice). In this case, you can calli2c_new_scanned_device() instead of i2c_new_client_device().

Example (from the nxp OHCI driver):

The above code instantiates up to 1 I2C device on the I2C bus which is onthe OHCI adapter in question. It first tries at address 0x2c, if nothingis found there it tries address 0x2d, and if still nothing is found, itsimply gives up.

The driver which instantiated the I2C device is responsible for destroyingit on cleanup. This is done by calling i2c_unregister_device() on thepointer that was earlier returned by i2c_new_client_device() ori2c_new_scanned_device().

Method 3: Probe an I2C bus for certain devices¶

Sometimes you do not have enough information about an I2C device, not evento call i2c_new_scanned_device(). The typical case is hardware monitoringchips on PC mainboards. There are several dozen models, which can liveat 25 different addresses. Given the huge number of mainboards out there,it is next to impossible to build an exhaustive list of the hardwaremonitoring chips being used. Fortunately, most of these chips havemanufacturer and device ID registers, so they can be identified byprobing.

In that case, I2C devices are neither declared nor instantiatedexplicitly. Instead, i2c-core will probe for such devices as soon as theirdrivers are loaded, and if any is found, an I2C device will beinstantiated automatically. In order to prevent any misbehavior of thismechanism, the following restrictions apply:

  • The I2C device driver must implement the detect() method, whichidentifies a supported device by reading from arbitrary registers.
  • Only buses which are likely to have a supported device and agree to beprobed, will be probed. For example this avoids probing for hardwaremonitoring chips on a TV adapter.

Example:See lm90_driver and lm90_detect() in drivers/hwmon/lm90.c

I2C devices instantiated as a result of such a successful probe will bedestroyed automatically when the driver which detected them is removed,or when the underlying I2C bus is itself destroyed, whichever happensfirst.

Those of you familiar with the I2C subsystem of 2.4 kernels and early 2.6kernels will find out that this method 3 is essentially similar to whatwas done there. Two significant differences are:

  • Probing is only one way to instantiate I2C devices now, while it was theonly way back then. Where possible, methods 1 and 2 should be preferred.Method 3 should only be used when there is no other way, as it can haveundesirable side effects.
  • I2C buses must now explicitly say which I2C driver classes can probethem (by the means of the class bitfield), while all I2C buses wereprobed by default back then. The default is an empty class which meansthat no probing happens. The purpose of the class bitfield is to limitthe aforementioned undesirable side effects.

Once again, method 3 should be avoided wherever possible. Explicit deviceinstantiation (methods 1 and 2) is much preferred for it is safer andfaster.

Method 4: Instantiate from user-space¶

In general, the kernel should know which I2C devices are connected andwhat addresses they live at. However, in certain cases, it does not, so asysfs interface was added to let the user provide the information. Thisinterface is made of 2 attribute files which are created in every I2C busdirectory: new_device and delete_device. Both files are writeonly and you must write the right parameters to them in order to properlyinstantiate, respectively delete, an I2C device.

File new_device takes 2 parameters: the name of the I2C device (astring) and the address of the I2C device (a number, typically expressedin hexadecimal starting with 0x, but can also be expressed in decimal.)

File delete_device takes a single parameter: the address of the I2Cdevice. As no two devices can live at the same address on a given I2Csegment, the address is sufficient to uniquely identify the device to bedeleted.


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While this interface should only be used when in-kernel device declarationcan’t be done, there is a variety of cases where it can be helpful:

  • The I2C driver usually detects devices (method 3 above) but the bussegment your device lives on doesn’t have the proper class bit set andthus detection doesn’t trigger.
  • The I2C driver usually detects devices, but your device lives at anunexpected address.
  • The I2C driver usually detects devices, but your device is not detected,either because the detection routine is too strict, or because yourdevice is not officially supported yet but you know it is compatible.
  • You are developing a driver on a test board, where you soldered the I2Cdevice yourself.

This interface is a replacement for the force_* module parameters some I2Cdrivers implement. Being implemented in i2c-core rather than in eachdevice driver individually, it is much more efficient, and also has theadvantage that you do not have to reload the driver to change a setting.You can also instantiate the device before the driver is loaded or evenavailable, and you don’t need to know what driver the device needs.

The System Management Bus (abbreviated to SMBus or SMB) is a single-ended simple two-wire bus for the purpose of lightweight communication. Most commonly it is found in computer motherboards for communication with the power source for ON/OFF instructions.

It is derived from I²C for communication with low-bandwidth devices on a motherboard, especially power related chips such as a laptop's rechargeable battery subsystem (see Smart Battery System). Other devices might include temperature, fan or voltage sensors, lid switches, clock generator, and RGB lighting. PCI add-in cards may connect to an SMBus segment.

A device can provide manufacturer information, indicate its model/part number, save its state for a suspend event, report different types of errors, accept control parameters and return status. The SMBus is generally not user configurable or accessible. Although SMBus devices usually can't identify their functionality, a new PMBus coalition has extended SMBus to include conventions allowing that.

The SMBus was defined by Intel and Duracell in 1994.[1] It carries clock, data, and instructions and is based on Philips' I²C serial bus protocol. Its clock frequency range is 10 kHz to 100 kHz. (PMBus extends this to 400 kHz.) Its voltage levels and timings are more strictly defined than those of I²C, but devices belonging to the two systems are often successfully mixed on the same bus.[citation needed]

SMBus is used as an interconnect in several platform management standards including: ASF, DASH, IPMI.

SMBus is used to access DRAM configuration information as part of serial presence detect. SMBus has grown into a wide variety of system enumeration use cases other than power management.

SMBus/I²C Interoperability[edit]

While SMBus is derived from I²C, there are several major differences between the specifications of the two busses in the areas of electricals, timing, protocols and operating modes.[2][3][4][5]


Input Voltage (VIL and VIH)[edit]

When mixing devices, the I²C specification defines the input levels to be 30% and 70% of the supply voltage VDD,[4]:9 which may be 5 V, 3.3 V, or some other value. Instead of relating the bus input levels to VDD, SMBus defines them to be fixed at 0.8 and 2.1 V. SMBus 2.0 supports VDD ranging from 3 to 5 V.SMBus 3.0 supports VDD ranging from 1.8 to 5 V.

Sink Current (IOL)[edit]

SMBus 2.0 defines a ‘High Power’ class that includes a 4 mA sink current that cannot be driven by I²C chips unless the pull-up resistor is sized to I²C-bus levels.

NXP devices have a higher power set of electrical characteristics than SMBus 1.0. The main difference is the current sink capability with VOL = 0.4 V.

  • SMBus low power = 350 μA
  • SMBus high power = 4 mA
  • I²C-bus = 3 mA

SMBus ‘high power’ devices and I²C-bus devices will work together if the pull-up resistor is sized for 3 mA.

Frequency (FMAX and FMIN)[edit]

The SMBus clock is defined from 10–100 kHz while I²C can be 0–100 kHz, 0–400 kHz, 0–1 MHz and 0–3.4 MHz, depending on the mode. This means that an I²C bus running at less than 10 kHz will not be SMBus compliant since the SMBus devices may time out. Many SMBus devices will however support lower frequencies.

SMBus 3.0 adds 400 kHz and 1 MHz bus speeds.


  • SMBus defines a clock low time-out, TIMEOUT of 35 ms. I²C does not specify any timeout limit.
  • SMBus specifies TLOW:SEXT as the cumulative clock low extend time for a slave device. I²C does not have a similar specification.
  • SMBus specifies TLOW:MEXT as the cumulative clock low extend time for a master device. Again I²C does not have a similar specification.
  • SMBus defines both rise and fall time of bus signals. I²C does not.
  • The SMBus time-out specifications do not preclude I²C devices co-operating reliably on the SMBus. It is the responsibility of the designer to ensure that I²C devices are not going to violate these bus timing parameters.


ACK and NACK usage[edit]

There are the following differences in the use of the NACK bus signaling:In I²C, a slave receiver is allowed to not acknowledge the slave address, if for example it's unable to receive because it's performing some real time task. SMBus requires devices to acknowledge their own address always, as a mechanism to detect a removable device's presence on the bus (battery, docking station, etc.)

I²C specifies that a slave device, although it may acknowledge its own address, may decide, some time later in the transfer, that it cannot receive any more data bytes. I²C specifies that the device may indicate this by generating the not acknowledge on the first byte to follow.

Other than to indicate a slave's device-busy condition, SMBus also uses the NACK mechanism to indicate the reception of an invalid command or datum. Since such a condition may occur on the last byte of the transfer, it is required that SMBus devices have the ability to generate the not acknowledge after the transfer of each byte and before the completion of the transaction. This is important because SMBus does not provide any other resend signaling. This difference in the use of the NACK signaling has implications on the specific implementation of the SMBus port, especially in devices that handle critical system data such as the SMBus host and the SBS components.

SMBus protocols[edit]

Each message transaction on SMBus follows the format of one of the defined SMBus protocols. The SMBus protocols are a subset of the data transfer formats defined in the I²C specifications. I²C devices that can be accessed through one of the SMBus protocols are compatible with the SMBus specifications. I²C devices that do not adhere to these protocols cannot be accessed by standard methods as defined in the SMBus and Advanced Configuration and Power Interface (ACPI) specifications.

Address Resolution Protocol[edit]

The SMBus uses I²C hardware and I²C hardware addressing, but adds second-level software for building special systems. In particular its specifications include an Address Resolution Protocol that can make dynamic address allocations.Dynamic reconfiguration of the hardware and software allow bus devices to be‘hot-plugged’ and used immediately, without restarting the system. The devices are recognized automatically and assigned unique addresses. This advantage results in a plug-and-play user interface. In both those protocols there is a very useful distinction made between a System Host and all the other devices in the system that can have the names and functions of masters or slaves.

Time-out feature[edit]

SMBus has a time-out feature which resets devices if a communication takes too long.This explains the minimum clock frequency of 10 kHz to prevent locking up the bus. I²C can be a ‘DC’ bus, meaning that a slave device stretches the master clock when performing some routine while the master is accessing it. This will notify to the master that the slave is busy but does not want to lose the communication. The slave device will allow continuation after its task is complete. There is no limit in the I²C-bus protocol as to how long this delay can be, whereas for an SMBus system, it would be limited to 35 ms.The SMBus protocol just assumes that if something takes too long, then it means that there is a problem on the bus and that all devices must reset in order to clear this mode. Slave devices are not then allowed to hold the clock LOW too long.

Packet Error Checking[edit]

SMBus 1.1 and later define optional Packet Error Checking (PEC). In that mode, a PEC (packet error code) byte is appended at the end of each transaction. The byte is calculated as CRC-8checksum, calculated over the entire message including the address and read/write bit. The polynomial used is x8+x2+x+1 (the CRC-8-ATMHEC algorithm, initialized to zero).[6][7][8]


The SMBus has an extra optional shared interrupt signal called SMBALERT#, which can be used by slaves to tell the host to ask its slaves about events of interest.SMBus also defines a less common 'Host Notify Protocol', providing similar notifications but passing more data and building on the I²C multi-master mode.


SMBus devices are supported by FreeBSD, OpenBSD, NetBSD, DragonFly BSD, Linux, Windows 2000 and newer and Windows CE.

See also[edit]

  • Embedded controller (EC)
  • Intelligent Platform Management Interface (IPMI)
  • Low Pin Count (LPC)
  • Serial Peripheral Interface (SPI)
  • Platform Environment Control Interface (PECI)
  • Host Embedded Controller Interface (HECI)
  • Intelligent Platform Management Bus (IPMB)
  • Power Management Bus (PMBus)
  • System Management Controller (SMC)
  • Advanced Configuration and Power Interface (ACPI)


  1. ^'DURACELL AND INTEL ANNOUNCE 'SMART BATTERY' SPECIFICATIONS FOR PORTABLE COMPUTERS - Free Online Library'. Thefreelibrary.com. Retrieved 27 October 2017.
  2. ^'System Management Bus (SMBus) Specification Version 2.0'(PDF). smbus.org
  3. ^'System Management Bus (SMBus) Specification Version 3.0'(PDF). smbus.org
  4. ^ ab'I2C-bus specification and user manual Rev. 6'(PDF). nxp.com
  5. ^'APPLICATION NOTE 476 Comparing the I²C Bus to the SMBus'. Maxim. 2000-12-01. 090429 maxim-ic.com
  6. ^'Designing with SMBus 2.0'(PDF). Sbs-forum.org. Retrieved 27 October 2017.
  7. ^'CRC-8 Calculator'. Smbus.org. Retrieved 27 October 2017.
  8. ^'CRC-8 for SMBus'. Picbasic.co.uk. Retrieved 27 October 2017.

External links[edit]

This article is based on material taken from the Free On-line Dictionary of Computing prior to 1 November 2008 and incorporated under the 'relicensing' terms of the GFDL, version 1.3 or later.

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